1. Field of the Invention
The present invention relates to a semiconductor device and, particularly, to a lateral bipolar type input/output protection device to be used for a semiconductor integrated circuit.
2. Description of the Related Art
A conventional lateral bipolar type input/output protection device is formed by the structure which includes a field oxide formed in a well region formed on a semiconductor substrate of the same conductivity type with the well region such as field isolation structure disclosed in Japanese Patent Application Laid-open Nos. H8-51188 and H7-122715. FIG. 3 is a cross section of a conventional lateral bipolar type input/output protection device. As shown in FIG. 3, an N type collector diffusion layer 12, an N type emitter diffusion layer 13 and a P type diffusion layer 14 for grounding a substrate are formed on a P type well 17 of the P type substrate 19 and the respective layers 12, 13, and 14 are isolated from each other by a field oxide film 16 formed by the Local Oxidation of Silicon (LOCOS). In this structure, when a negative high voltage pulse is applied to an input/output terminal 11 due to electrostatic discharge (ESD), etc., a PN junction between the N type collector diffusion layer 12 and the P type well 17 is forward-biased, so that over-current flows from the input/output terminal 11 through the P type diffusion layer 14 to a ground terminal 15, by the forward diode formed by the PN junction. When a positive high voltage pulse is applied to an input/output terminal 11 due to ESD, etc., the PN junction between the N type collector diffusion layer 12 and the P type well 17 is reverse-biased, and, when the applied voltage exceeds a breakdown voltage of the junction, avalanche breakdown current as well as a substrate current due to impact ionization in an end portion of the junction flow to the P type well 17. With the avalanche breakdown current and the substrate current flowing to the P type well 17, a potential of the P type well 17 rises with respect to the ground terminal 15, due to an influence of a parasitic resistance component of the P type well 17. When the potential of the P type well 17 rises and the PN junction between the P type well 17 and the N type emitter diffusion layer 13 becomes forward-biased, a lateral NPN bipolar transistor turns ON and a voltage between the input/output terminal 11 and the ground terminal 15 is clamped at a low value. As mentioned, when the positive high voltage pulse is applied to the input/output terminal 11 due to ESD, etc., the lateral NPN bipolar transistor turns ON to release the over-current to the ground terminal 15.
Conventional input/output protection devices themselves are also disclosed in Japanese Patent Application Laid-open Nos. S62-224057, S63-278267 and H3-272180.
In a recent semiconductor integrated circuit, in order to increase the integration density, a shallow trench isolation (STI) structure is becoming popular as the field isolation structure in lieu of the LOCOS structure. In the STI structure, however, it is necessary, in order to keep a fine isolation, to provide an isolation oxide film deeper compared with that of the LOCOS structure. If such STI structure, in which a field oxide film is formed deeper, were applied to the conventional lateral bipolar type input/output protection device, a base width should be increased during a bipolar operation thereof and current amplification is lowered, so that the bipolar operation hardly occurs. Therefore, the STI structure can not be applied to the conventional lateral bipolar type input/output protection device since the ESD protection performance is degraded.
An object of the present invention is to provide a lateral bipolar type input/output protection device whose protection performance is not degraded even when a deep field isolation structure such as the STI structure is applied.
A lateral bipolar type input/output protection device according to the present invention has a well formed below an emitter impurity diffusion layer and having the same conductivity type as that of the emitter impurity diffusion layer. Therefore, it is possible to easily perform a bipolar operation and to prevent protection performance from being degraded. As a result, it is obtained sufficient ESD robustness even when the size of the semiconductor integrated circuit is smaller by using the field isolation structure such as STI structure.